Description
The E-DCH Dedicated Physical Control Channel (E-DPCCH) is a dedicated uplink physical channel used exclusively in Frequency Division Duplex (FDD) mode UMTS and HSPA systems. It is always transmitted simultaneously with the Enhanced Dedicated Physical Data Channel (E-DPDCH) when the User Equipment (UE) is engaged in an E-DCH (Enhanced Dedicated Channel) transmission. Its sole purpose is to carry the necessary out-of-band control signaling that the NodeB receiver requires to successfully demodulate, decode, and process the user data arriving on the parallel E-DPDCH(s).
The E-DPCCH carries a fixed-size control frame for each 2 ms subframe (or 10 ms frame in optional configurations). This control information includes several key fields: The Transport Format Combination Indicator (TFCI), which informs the NodeB about the exact transport format (e.g., data block size, channel coding parameters) used on the E-DPDCHs in that subframe. The Retransmission Sequence Number (RSN) indicates whether the data in the accompanying subframe is a new transmission or a retransmission, and if so, which HARQ process it belongs to, which is crucial for the Hybrid ARQ soft combining operation.
Another critical field is the Happy Bit. This is a single-bit indicator sent by the UE to inform the NodeB scheduler about its satisfaction with the current granted uplink data rate. If the UE has more data in its buffer than it can transmit with the current grant and its power headroom allows for a higher grant, it will set the Happy Bit to 'unhappy,' signaling a request for more resources. The NodeB scheduler uses this feedback, along with power measurements and other UE reports, to dynamically adjust the grants sent to UEs on the downlink E-AGCH and E-RGCH channels. The E-DPCCH is spread using a dedicated channelization code and is transmitted with a power offset relative to the associated DPCCH, ensuring reliable reception of this critical control data even when the data channel power varies.
Purpose & Motivation
The E-DPCCH was created as an essential companion to the E-DPDCH to enable the high-performance operation of the E-DCH (HSUPA). The advanced features of E-DCH, such as fast NodeB scheduling and physical-layer HARQ with incremental redundancy, require that the NodeB have immediate and reliable knowledge of transmission parameters for each subframe. This control information cannot be efficiently or robustly multiplexed with the user data on the E-DPDCH itself.
Its purpose is to provide a dedicated, low-latency, and reliable signaling path for this critical control data. By carrying the TFCI, it allows for adaptive modulation and coding on a per-subframe basis. By carrying the RSN, it enables the HARQ mechanism to function correctly. By carrying the Happy Bit, it closes the fast feedback loop for the NodeB scheduler. Without the E-DPCCH, the NodeB would be unable to decode the high-speed data on the E-DPDCH, rendering HSUPA inoperable. It solves the problem of separating high-reliability control signaling from variable-rate user data in a fast-paced, scheduled uplink environment, which was a key enabler for the low latency and high efficiency targets of HSUPA.
Key Features
- Transmitted in parallel with the E-DPDCH during E-DCH uplink transmissions.
- Carries the Transport Format Combination Indicator (TFCI) for E-DPDCH decoding.
- Carries the Retransmission Sequence Number (RSN) for HARQ process management.
- Includes the Happy Bit for UE scheduling feedback to the NodeB.
- Uses a fixed spreading factor (SF) of 256 for robust transmission.
- Transmitted with a configurable power offset relative to the uplink DPCCH.
Evolution Across Releases
Initially defined alongside the E-DCH as part of HSUPA. Specified the channel structure, spreading (SF256), and the encoding of the control fields (TFCI, RSN, Happy Bit) within its 30-bit frame per 2ms subframe. Established its role in supporting the 2ms TTI operation and fast HARQ/scheduling mechanisms.
Defining Specifications
| Specification | Title |
|---|---|
| TS 25.101 | 3GPP TS 25.101 |
| TS 25.133 | 3GPP TS 25.133 |
| TS 25.211 | 3GPP TS 25.211 |
| TS 25.212 | 3GPP TS 25.212 |
| TS 25.213 | 3GPP TS 25.213 |
| TS 25.214 | 3GPP TS 25.214 |
| TS 25.302 | 3GPP TS 25.302 |
| TS 25.309 | 3GPP TS 25.309 |
| TS 25.319 | 3GPP TS 25.319 |
| TS 25.321 | 3GPP TS 25.321 |
| TS 25.331 | 3GPP TS 25.331 |
| TS 25.800 | 3GPP TS 25.800 |
| TS 25.823 | 3GPP TS 25.823 |
| TS 25.903 | 3GPP TS 25.903 |
| TS 25.927 | 3GPP TS 25.927 |
| TS 25.967 | 3GPP TS 25.967 |