DAC

Digital-to-Analogue Converter

Physical Layer
Introduced in Rel-5
A fundamental hardware component that converts digital signals into analogue waveforms for transmission over physical media. It enables digital baseband processing to interface with analogue radio frequency chains in both transmitters and receivers. Its performance directly impacts signal quality, spectral purity, and overall radio system fidelity.

Description

A Digital-to-Analogue Converter (DAC) is a critical mixed-signal integrated circuit that transforms discrete-time, discrete-amplitude digital samples into continuous-time, continuous-amplitude analogue signals. In 3GPP systems, DACs operate at the interface between digital baseband processing units and analogue radio frequency (RF) front-ends, enabling the physical transmission of digitally processed information over wireless channels. The conversion process involves reconstructing an analogue waveform from digital samples using techniques such as pulse shaping, interpolation filtering, and analogue reconstruction filtering to meet stringent spectral mask requirements and minimize out-of-band emissions.

Architecturally, DACs in 3GPP radio equipment are characterized by key performance parameters including resolution (bit depth), sampling rate, spurious-free dynamic range (SFDR), signal-to-noise ratio (SNR), and total harmonic distortion (THD). Higher-order modulation schemes like 256-QAM and 1024-QAM in 5G NR demand DACs with exceptional linearity and low noise floors to maintain constellation accuracy and minimize error vector magnitude (EVM). Modern DAC implementations often incorporate digital pre-distortion, noise shaping, and advanced interpolation filters to optimize performance while meeting power efficiency targets.

The DAC's role extends across both transmitter and receiver chains. In transmitters, it converts digitally modulated baseband signals to analogue form for upconversion to RF frequencies. In receivers, it may be used in feedback paths for digital predistortion systems or in certain receiver architectures. The DAC's performance directly impacts key system metrics including adjacent channel leakage ratio (ACLR), error vector magnitude (EVM), and throughput. As 3GPP systems have evolved through 4G LTE to 5G NR, DAC requirements have become increasingly stringent to support wider bandwidths, higher carrier frequencies, and more complex modulation schemes while maintaining spectral efficiency and regulatory compliance.

Implementation considerations include clock jitter sensitivity, which affects phase noise and ultimately system EVM; thermal management, as high-speed DACs generate significant heat; and integration with digital front-end (DFE) components. Advanced DAC architectures employ techniques like segmented current-steering, return-to-zero switching, and multi-core interpolation to achieve the necessary performance for millimeter-wave applications in 5G. The DAC's specifications are carefully balanced against analogue-to-digital converter (ADC) requirements to maintain end-to-end signal chain integrity across the radio interface.

Purpose & Motivation

The DAC exists to bridge the digital and analogue domains in wireless communication systems, enabling the practical implementation of sophisticated digital signal processing algorithms in real-world radio equipment. As 3GPP standards evolved from 2G GSM to 5G NR, the industry shifted toward software-defined radios and digital baseband processing to achieve greater flexibility, programmability, and performance. However, the physical transmission medium remains analogue, requiring high-fidelity conversion between these domains.

Historically, early cellular systems used predominantly analogue components with limited digital processing. The transition to digital systems in 2G GSM revealed the need for precise DACs to convert digitally processed voice signals to analogue form for RF transmission. Each subsequent generation introduced more complex digital modulation schemes (QPSK, 16-QAM, 64-QAM, etc.) and wider bandwidths, placing increasing demands on DAC performance. The limitations of earlier DAC technologies included insufficient resolution for higher-order modulations, inadequate sampling rates for wider bandwidths, and excessive power consumption for mobile applications.

The creation and continuous improvement of DAC technology addresses fundamental challenges in wireless communications: maintaining signal integrity through the digital-to-analogue conversion process, minimizing distortion that degrades system performance, and enabling the practical implementation of advanced digital signal processing techniques. Without high-performance DACs, the sophisticated modulation schemes, multiple access techniques, and spectral efficiency improvements defined in 3GPP standards would be impossible to realize in practical radio equipment. The DAC thus serves as an essential enabler for the evolution of cellular technology from voice-centric systems to broadband data networks supporting diverse services and applications.

Key Features

  • Converts digital baseband samples to analogue waveforms for RF transmission
  • Supports high-resolution conversion (typically 12-16 bits) for complex modulation schemes
  • Operates at sampling rates exceeding Nyquist requirements for wide bandwidth signals
  • Incorporates interpolation filters and reconstruction filters to meet spectral masks
  • Provides low noise floor and high linearity to minimize EVM and ACLR
  • Enables digital predistortion through feedback paths in transmitter architectures

Evolution Across Releases

Rel-5 Initial

Introduced as a fundamental component in HSDPA-capable Node B equipment, supporting higher data rates through 16-QAM modulation. Initial specifications focused on basic conversion requirements for WCDMA signals with 5 MHz bandwidth. DAC performance requirements were established to maintain acceptable EVM for voice and early data services, with emphasis on meeting 3GPP spectral emission masks for UMTS operation.

Defining Specifications

SpecificationTitle
TS 21.905 3GPP TS 21.905
TS 23.700 3GPP TS 23.700
TS 26.110 3GPP TS 26.110
TS 26.115 3GPP TS 26.115
TS 26.131 3GPP TS 26.131
TS 26.132 3GPP TS 26.132
TS 38.877 3GPP TR 38.877
TS 43.050 3GPP TR 43.050